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HPCA
2009
IEEE
15 years 10 months ago
Elastic-buffer flow control for on-chip networks
This paper presents elastic buffers (EBs), an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input virtualchannel b...
George Michelogiannakis, James D. Balfour, William...
HPCA
2009
IEEE
15 years 10 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
EUROPAR
2007
Springer
15 years 3 months ago
New Approaches for Relay Selection in IEEE 802.16 Mobile Multi-hop Relay Networks
The IEEE 802.16 mobile multi-hop relay (MMR) task group ’j’ (TGj) has recently introduced the multi-hop relaying concept in the IEEE 802.16 WirelessMAN, wherein a newly introdu...
Deepesh Man Shrestha, Sung-Hee Lee, Sung-Chan Kim,...
HPCA
2009
IEEE
15 years 10 months ago
A low-radix and low-diameter 3D interconnection network design
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...
Bo Zhao, Jun Yang 0002, Xiuyi Zhou, Yi Xu, Youtao ...
CODES
2005
IEEE
15 years 3 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...