787 search results - page 124 / 158 » Digital Algebra and Circuits |
100
Voted
WCE
2007
14 years 11 months ago
2007
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
IEICET
2008
14 years 10 months ago
2008
This paper studies impact of the well edge proximity effect on digital circuit delay, based on model parameters extracted from test structures in an industrial 65nm wafer process. ...
107
Voted
INTEGRATION
2006
14 years 10 months ago
2006
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
76
Voted
FTEDA
2007
14 years 10 months ago
2007
Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over the last decade. A crucial part of their creation lies in their archite...
66
Voted
TCAD
1998
14 years 9 months ago
1998
—This paper introduces a novel optimization paradigm for increasing the throughput of digital systems. The basic idea consists of transforming fixed-latency units into variable-...