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ASYNC
2005
IEEE
97views Hardware» more  ASYNC 2005»
16 years 7 hour ago
Self-Timed Circuitry for Global Clocking
We present an apparatus used to distribute a timing reference or clock across the extent of a digital system. Selftimed circuitry both generates and distributes a clock signal, wh...
Scott Fairbanks, Simon W. Moore
FPL
2008
Springer
113views Hardware» more  FPL 2008»
15 years 8 months ago
Mapping and scheduling with task clustering for heterogeneous computing systems
This paper presents a new approach for mapping task graphs to heterogeneous hardware/software computing systems using heuristic search techniques. Two techniques: (1) integration ...
Yuet Ming Lam, José Gabriel F. Coutinho, Wa...
APVIS
2001
15 years 7 months ago
Visual Programs Module Choice and Layout in the Nord Modular Patch Language
The Nord Modular music synthesiser system comprises a standalone array of digital signal processors programmed by a dataflow visual langauage and supported by a visual programming...
James Noble, Robert Biddle
185
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DSD
2009
IEEE
387views Hardware» more  DSD 2009»
16 years 1 months ago
Architecture and DSP Implementation of a DVB-S2 Baseband Demodulator
—This paper presents the design and implementation of a baseband demodulator for DVB-S2 satellite receivers. In order to meet the requirements of different complex and multidomai...
Panayiotis Savvopoulos, Nikolaos Papandreou, Theod...
DATE
2003
IEEE
103views Hardware» more  DATE 2003»
15 years 11 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....