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ARC
2006
Springer
201views Hardware» more  ARC 2006»
15 years 10 months ago
Dynamic Partial Reconfigurable FIR Filter Design
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
Yeong-Jae Oh, Hanho Lee, Chong Ho Lee
KES
2006
Springer
15 years 6 months ago
Implementation of a FIR Filter on a Partial Reconfigurable Platform
This paper presents our implemented, synthesized and tested on demand and partial reconfiguration approaches for FIR filters using Xilinx Virtex FPGAs. Our scope is to implement a ...
Hanho Lee, Chang-Seok Choi
CORR
2010
Springer
152views Education» more  CORR 2010»
15 years 3 months ago
Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
SCOPES
2004
Springer
15 years 11 months ago
DSP Code Generation with Optimized Data Word-Length Selection
Digital signal processing applications are implemented in embedded systems with fixed-point arithmetic to minimize the cost and the power consumption. To reduce the application ti...
Daniel Menard, Olivier Sentieys
ICCAD
2000
IEEE
149views Hardware» more  ICCAD 2000»
15 years 10 months ago
Dynamic Response Time Optimization for SDF Graphs
Synchronous Data Flow (SDF) is a well-known model of computation that is widely used in the control engineering and digital signal processing domains. Existing scheduling methods ...
Dirk Ziegenbein, Jan Uerpmann, Ralph Ernst