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GLVLSI
2002
IEEE
109views VLSI» more  GLVLSI 2002»
15 years 4 months ago
Minimizing resources in a repeating schedule for a split-node data-flow graph
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
JEC
2006
61views more  JEC 2006»
14 years 11 months ago
Time-constrained loop scheduling with minimal resources
Many applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). In our previous work, we proposed a ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
15 years 4 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
HAPTICS
2005
IEEE
15 years 5 months ago
Perceptibility of Haptic Digital Watermarking of Virtual Textures
Digital watermarking refers to the process of embedding a digital code into an image, video, printed document or audio media. The code should not interfere with the normal use of ...
Domenico Prattichizzo, Mauro Barni, Hong Z. Tan, S...
ICASSP
2010
IEEE
15 years 1 days ago
Forensic estimation and reconstruction of a contrast enhancement mapping
Due to the ease with which convincing digital image forgeries can be created, a need has arisen for digital forensic techniques capable of detecting image manipulation. Once image...
Matthew C. Stamm, K. J. Ray Liu