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161
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TC
1998
15 years 4 months ago
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices
—This paper describes a new signed-digit full adder (SDFA) circuit consisting of resonant-tunneling diodes (RTDs) and metal-oxide semiconductor field effect transistors (MOSFETs)...
Alejandro F. González, Pinaki Mazumder
170
Voted
ICCAD
2007
IEEE
151views Hardware» more  ICCAD 2007»
15 years 8 months ago
A design flow dedicated to multi-mode architectures for DSP applications
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
Cyrille Chavet, Caaliph Andriamisaina, Philippe Co...
SIPS
2007
IEEE
15 years 11 months ago
Peak-to-Average Power Ratio Reduction in an FDM Broadcast System
Digital predistortion is a technique used to reduce the signal dynamic range in a multichannel system in order to improve power amplifier (PA) efficiency. These techniques have be...
Zhengya Zhang, Renaldi Winoto, Ahmad Bahai, Borivo...
DSD
2008
IEEE
136views Hardware» more  DSD 2008»
15 years 11 months ago
Flexible Baseband Architectures for Future Wireless Systems
— The mobile communication systems today, have different radio spectrum, radio access technologies, and protocol stacks depending on the network being utilized. This gives rise t...
Najam-ul-Islam Muhammad, Rizwan Rasheed, Renaud Pa...
DATE
2007
IEEE
156views Hardware» more  DATE 2007»
15 years 11 months ago
Process variation tolerant low power DCT architecture
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
Nilanjan Banerjee, Georgios Karakonstantis, Kaushi...