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» Direct Cache Access for High Bandwidth Network I O
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ISCA
2005
IEEE
121views Hardware» more  ISCA 2005»
15 years 3 months ago
Direct Cache Access for High Bandwidth Network I/O
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...
Ram Huggahalli, Ravi R. Iyer, Scott Tetrick
HPCA
2011
IEEE
14 years 1 months ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
HPCA
2001
IEEE
15 years 9 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger
IPPS
1998
IEEE
15 years 1 months ago
Pin-Down Cache: A Virtual Memory Management Technique for Zero-Copy Communication
The overhead of copying data through the central processor by a message passing protocol limits data transfer bandwidth. If the network interface directly transfers the user'...
Hiroshi Tezuka, Francis O'Carroll, Atsushi Hori, Y...
GI
2004
Springer
15 years 2 months ago
An Architecture Concept for Mobile P2P File Sharing Services
Abstract: File-sharing in mobile networks has differing demands to a P2P architecture. Resource access and mediation techniques must follow constraints given in 2.5G/3G networks. E...
Frank-Uwe Andersen, Hermann de Meer, Ivan Dedinski...