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91
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CF
2005
ACM
15 years 7 days ago
An efficient wakeup design for energy reduction in high-performance superscalar processors
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Kuo-Su Hsiao, Chung-Ho Chen
105
Voted
CF
2006
ACM
15 years 7 days ago
Intermediately executed code is the key to find refactorings that improve temporal data locality
The growing speed gap between memory and processor makes an efficient use of the cache ever more important to reach high performance. One of the most important ways to improve cac...
Kristof Beyls, Erik H. D'Hollander
105
Voted
IPSN
2010
Springer
15 years 6 days ago
Adaptive IEEE 802.15.4 protocol for energy efficient, reliable and timely communications
The IEEE 802.15.4 standard for wireless sensor networks can support energy efficient, reliable, and timely packet transmission by tuning the medium access control parameters macMi...
Pan Gun Park, Carlo Fischione, Karl Henrik Johanss...
90
Voted
CONEXT
2005
ACM
15 years 6 days ago
MRS: a simple cross-layer heuristic to improve throughput capacity in wireless mesh networks
Wireless Mesh Networks (WMNs) are an emerging architecture based on multi-hop transmission. ISPs considers WMNs as a potential future technology to offer broadband Internet acces...
Luigi Iannone, Serge Fdida
DAC
2005
ACM
15 years 6 days ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
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