This work presents the development of a coarse grain reconfigurable unit to be coupled to a native Java microcontroller, which is designed for an optimized execution of the embedd...
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
In this paper we describe one experiment in which a new coordination language, called MANIFOLD, is used to restructure an existing sequential Fortran code from computational uid dy...
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
The main objective of the REMPLI project1 is to develop a distributed infrastructure suitable for realtime monitoring and control of energy distribution and consumption. PLC techn...