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132
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EUROPAR
2007
Springer
15 years 9 months ago
Hardware Transactional Memory with Operating System Support, HTMOS
Abstract. Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yiel...
Sasa Tomic, Adrián Cristal, Osman S. Unsal,...
128
Voted
IEEEPACT
2006
IEEE
15 years 9 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
127
Voted
ICDCSW
2005
IEEE
15 years 9 months ago
On Optimal TTL Sequence-Based Route Discovery in MANETs
In on-demand multi-hop routing protocols for MANETs such as DSR and AODV, a fundamental requirement for peer-to-peer connectivity is to discover routes to a remote node via flood...
Dimitrios Koutsonikolas, Saumitra M. Das, Himabind...
122
Voted
IEEEPACT
2005
IEEE
15 years 9 months ago
Performance Analysis of System Overheads in TCP/IP Workloads
Current high-performance computer systems are unable to saturate the latest available high-bandwidth networks such as 10 Gigabit Ethernet. A key obstacle in achieving 10 gigabits ...
Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Rona...
144
Voted
IEEEPACT
2005
IEEE
15 years 9 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...