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ICPP
2003
IEEE
15 years 11 months ago
Enabling Partial Cache Line Prefetching Through Data Compression
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
Youtao Zhang, Rajiv Gupta
ICPP
2003
IEEE
15 years 11 months ago
Procedural Level Address Offset Assignment of DSP Applications with Loops
Automatic optimization of address offset assignment for DSP applications, which reduces the number of address arithmetic instructions to meet the tight memory size restrictions an...
Youtao Zhang, Jun Yang 0002
IPPS
2003
IEEE
15 years 11 months ago
Continuous Compilation: A New Approach to Aggressive and Adaptive Code Transformation
Over the past several decades, the compiler research community has developed a number of sophisticated and powerful algorithms for a varierty of code improvements. While there are...
Bruce R. Childers, Jack W. Davidson, Mary Lou Soff...
IPPS
2003
IEEE
15 years 11 months ago
Implementation of a Calendar Application Based on SyD Coordination Links
System on Devices (SyD) is a specification for a middleware to enable heterogeneous collections of information, databases, or devices (such as hand-held devices) to collaborate wi...
Sushil K. Prasad, Anu G. Bourgeois, Erdogan Dogdu,...
SPAA
2003
ACM
15 years 11 months ago
The load rebalancing problem
In the classical load balancing or multiprocessor scheduling problem, we are given a sequence of jobs of varying sizes and are asked to assign each job to one of the m empty proce...
Gagan Aggarwal, Rajeev Motwani, An Zhu
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