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124
Voted
HPCA
2007
IEEE
15 years 10 months ago
2007
IEEE
To provide high dependability in a multithreaded system despite hardware faults, the system must detect and correct errors in its shared memory system. Recent research has explore...
144
Voted
HPCA
2007
IEEE
15 years 10 months ago
2007
IEEE
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...
130
Voted
ICC
2007
IEEE
15 years 10 months ago
2007
IEEE
— Colluding malicious insider nodes with no special hardware capability can use packet encapsulation and tunnelling to create bogus short-cuts (in-band wormholes) in routing path...
121
Voted
ICC
2007
IEEE
15 years 10 months ago
2007
IEEE
A multi-cabinet implementation of a combined input and crosspoint queued (CICQ) switch introduces a large RTT latency between the line cards and switch fabric, requiring a large cr...
93
Voted
ICMCS
2007
IEEE
15 years 10 months ago
2007
IEEE
The push method for data transmission in peer-to-peer system has drawn great interest, since it can efficiently reduce the accumulated latency observed at user nodes. However, it ...