Sciweavers

869 search results - page 155 / 174
» Distributed Dynamic Speed Scaling
Sort
View
IPPS
2010
IEEE
14 years 7 months ago
Runtime checking of serializability in software transactional memory
Abstract--Ensuring the correctness of complex implementations of software transactional memory (STM) is a daunting task. Attempts have been made to formally verify STMs, but these ...
Arnab Sinha, Sharad Malik
HPCA
2011
IEEE
14 years 1 months ago
Archipelago: A polymorphic cache design for enabling robust near-threshold operation
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
SPAA
2012
ACM
13 years 2 days ago
Memory-mapping support for reducer hyperobjects
hyperobjects (reducers) provide a linguistic abstraction for dynamic multithreading that allows different branches of a parallel program to maintain coordinated local views of the...
I.-Ting Angelina Lee, Aamir Shafi, Charles E. Leis...
DATE
2009
IEEE
127views Hardware» more  DATE 2009»
15 years 4 months ago
Process variation aware thread mapping for Chip Multiprocessors
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
Shengyan Hong, Sri Hari Krishna Narayanan, Mahmut ...
WETICE
2009
IEEE
15 years 4 months ago
Cloud Computing and the Lessons from the Past
— The skyrocketing demand for a new generation of cloud-based consumer and business applications is driving the need for next generation of datacenters that must be massively sca...
Rao Mikkilineni, Vijay Sarathy