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PRDC
2006
IEEE
15 years 11 months ago
SEVA: A Soft-Error- and Variation-Aware Cache Architecture
As SRAM devices are scaled down, the number of variation-induced defective memory cells increases rapidly. Combination of ECC, particularly SECDED, with a redundancy technique can...
Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai
173
Voted
PEWASUN
2005
ACM
15 years 10 months ago
An error model for inter-vehicle communications in highway scenarios at 5.9GHz
The design and evaluation of Inter-Vehicle Communication (IVC) protocols rely much on the accurate and efficient computational simulations. For simulations of Medium Access Contro...
Yunpeng Zang, Lothar Stibor, Georgios Orfanos, Shu...
EWSN
2010
Springer
15 years 8 months ago
Mitigating the Effects of RF Interference through RSSI-Based Error Recovery
On a common sensor node platform (Telos) we sample RSSI with high frequency during packet reception. We find that a packet collision (RF interference) often manifests as a measurab...
Jan-Hinrich Hauer, Andreas Willig, Adam Wolisz
130
Voted
CNSR
2005
IEEE
15 years 7 months ago
An Integrated Error Control and Constrained Sequence Code Based on Multimode Coding
We present a method of integrating constrained sequence (CS) and error control (EC) codes for digital communication systems. This technique is based on multimode coding where a si...
A. Hughes, I. J. Fair
SAC
2008
ACM
15 years 3 months ago
ICER: a tool for finding errors in a UML model
Detecting errors in an early phase of software development can help to reduce the cost of software systems. Many research attempts presented a fixed set of rules to help finding e...
Wuwei Shen, Dae-Kyoo Kim