This paper explores microarchitecture models for a simultaneous multithreaded processor with multimedia enhancements. We enhance a wide-issue superscalar processor by the simultan...
This paper describes a new parallel algorithm for Minimum Cost Path computation on the Polymorphic Processor Array, a massively parallel architecture based on a reconfigurable mesh...
This paper presents a new fault-tolerant scheduling algorithm for multiprocessor hard-real-time systems. The so called partitioning method is used to schedule a set of tasks in a ...
Alan A. Bertossi, Andrea Fusiello, Luigi V. Mancin...
A methodology for hierarchicalstatistical circuit characterization which does not rely upon circuit-level Monte Carlo simulation is presented. The methodology uses principalcompon...
Eric Felt, Stefano Zanella, Carlo Guardiani, Alber...
A novel routing scheme is proposed for virtual cutthrough routing that attempts to combine the low routing delay of deterministic routing with the exibility and low queuing delays...