6518 search results - page 545 / 1304 » Distributed Individual-Based Simulation |
145
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HPCA
1997
IEEE
15 years 11 months ago
1997
IEEE
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
164
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ICPP
1997
IEEE
15 years 11 months ago
1997
IEEE
In this paper, we present a strongly fault-tolerant design for the k-ary n-cube multiprocessor and examine its reconfigurability. Our design augments the k-ary n-cube with k j ...
167
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IPPS
1997
IEEE
15 years 11 months ago
1997
IEEE
We present a new analytical approach for the performance evaluation of asynchronous wormhole routing in k-ary n-cubes. Through the analysis of network flows, our methodology furni...
157
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PDP
1997
IEEE
15 years 11 months ago
1997
IEEE
Event tracing and monitoring of parallel applications are difficult if each processor has its own unsynchronized clock. A survey is given on several strategies to generate a glob...
170
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IPPS
1996
IEEE
15 years 11 months ago
1996
IEEE
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...