We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Heterogeneous computing environments have become attractive platforms to schedule computationally intensive jobs. We consider the problem of mapping independent tasks onto machines...
Praveen Holenarsipur, Vladimir Yarmolenko, Jos&eac...
We describe parallel implementations of LU factorization with pivoting for multicore architectures. Implementations that differ in two different dimensions are discussed: (1) usin...
Ernie Chan, Robert A. van de Geijn, Andrew Chapman
Knowing where vacant taxis are and will be at a given time and location helps the users in daily planning and scheduling, as well as the taxi service providers in dispatching. In t...
Santi Phithakkitnukoon, Marco Veloso, Carlos Bento...
We explore asynchronous unison in the presence of systemic transient and permanent Byzantine faults in shared memory. We observe that the problem is not solvable under less than s...
Swan Dubois, Maria Gradinariu Potop-Butucaru, Mikh...