This paper presents an investigation into local mechanisms and scheduling policies that allow guest processes to efficiently exploit otherwise-idle workstation resources. Unlike t...
Kyung Dong Ryu, Jeffrey K. Hollingsworth, Peter J....
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
: A three-dimensional, self-reconfigurable structure is proposed. The structure is a fully distributed system composed of many identical 3-D units. Each unit has functions of chang...
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...