Sciweavers

2488 search results - page 355 / 498
» Distributed Non-binary Constraints
Sort
View
SPAA
2000
ACM
15 years 9 months ago
Fault tolerant networks with small degree
In this paper, we study the design of fault tolerant networks for arrays and meshes by adding redundant nodes and edges. For a target graph G (linear array or mesh in this paper),...
Li Zhang
131
Voted
DATE
2010
IEEE
148views Hardware» more  DATE 2010»
15 years 9 months ago
Scoped identifiers for efficient bit aligned logging
Abstract--Detailed diagnostic data is a prerequisite for debugging problems and understanding runtime performance in distributed wireless embedded systems. Severe bandwidth limitat...
Roy Shea, Mani B. Srivastava, Young Cho
FCCM
1999
IEEE
111views VLSI» more  FCCM 1999»
15 years 9 months ago
Optimizing FPGA-Based Vector Product Designs
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...
Dan Benyamin, John D. Villasenor, Wayne Luk
HPCA
1999
IEEE
15 years 9 months ago
A Study of Control Independence in Superscalar Processors
Control independence has been put forward as a significant new source of instruction-level parallelism for future generation processors. However, its performance potential under p...
Eric Rotenberg, Quinn Jacobson, James E. Smith
ICPP
1999
IEEE
15 years 9 months ago
A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations
There has been much work recently on improving the locality performance of loop nests in scientific programs through the use of loop as well as data layout optimizations. However,...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...