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IEEEPACT
2006
IEEE
15 years 9 months ago
Overlapping dependent loads with addressless preload
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir
PDP
2002
IEEE
15 years 8 months ago
A Hardware-Accelerated Novel IR System
AURA (Advanced Uncertain Reasoning Architecture) is a generic family of techniques and implementations intended for high-speed approximate search and match operations on large uns...
Michael Weeks, Victoria J. Hodge, Jim Austin
IPPS
2006
IEEE
15 years 9 months ago
D1HT: a distributed one hop hash table
Distributed Hash Tables (DHTs) have been used in a variety of applications, but most DHTs so far have opted to solve lookups with multiple hops, which sacrifices performance in o...
Luiz Rodolpho Monnerat, Cláudio L. Amorim
PPOPP
1999
ACM
15 years 7 months ago
MagPIe: MPI's Collective Communication Operations for Clustered Wide Area Systems
Writing parallel applications for computational grids is a challenging task. To achieve good performance, algorithms designed for local area networks must be adapted to the differ...
Thilo Kielmann, Rutger F. H. Hofman, Henri E. Bal,...
ICS
1998
Tsinghua U.
15 years 7 months ago
Dependence Driven Execution for Multiprogrammed Multiprocessor
Abstract Barrier synchronizations can be very expensive on multiprogramming environment because no process can go past a barrier until all the processes have arrived. If a process ...
Suvas Vajracharya, Dirk Grunwald