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HPCA
2005
IEEE
16 years 3 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
117
Voted
ACTA
2006
154views more  ACTA 2006»
15 years 3 months ago
Solving HPP and SAT by P Systems with Active Membranes and Separation Rules
The P systems (or membrane systems) are a class of distributed parallel computing devices of a biochemical type, where membrane division is the frequently investigated way for obta...
Linqiang Pan, Artiom Alhazov
ICCAD
2009
IEEE
133views Hardware» more  ICCAD 2009»
15 years 1 months ago
A parallel preconditioning strategy for efficient transistor-level circuit simulation
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...
HPDC
1998
IEEE
15 years 7 months ago
Metascheduling: A Scheduling Model for Metacomputing Systems
Abstract Metacomputing is the seamless application of geographically-separated distributed computing resources to user applications. We consider the scheduling of metaapplications;...
Jon B. Weissman
136
Voted
OOPSLA
2005
Springer
15 years 9 months ago
X10: an object-oriented approach to non-uniform cluster computing
It is now well established that the device scaling predicted by Moore’s Law is no longer a viable option for increasing the clock frequency of future uniprocessor systems at the...
Philippe Charles, Christian Grothoff, Vijay A. Sar...