122 search results - page 6 / 25 » Distributed Reorder Buffer Schemes for Low Power |
81
Voted
TVLSI
2002
14 years 9 months ago
2002
: Clock networks account for a significant fraction of the power dissipation of a chip and are critical to performance. This paper presents theory and algorithms for building a low...
84
Voted
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
The current work describes a new standing wave oscillator scheme aimed for clock propagation on coplanar transmission lines on a silicon die. The design is aimed for clock signali...
70
Voted
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Abstract—Design guidelines for resonant H-tree clock distribution networks are presented in this paper. A distributed model of a two-level resonant H-tree structure is described,...
117
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ADHOCNOW
2004
Springer
15 years 3 months ago
2004
Springer
Recent theoretical results show that it is optimal to allow interfering sources to transmit simultaneously as long as they are outside a well-defined exclusion region around a de...
WIOPT
2010
IEEE
2010
IEEE
Low complexity algorithms for relay selection and power control in interference-limited environments
14 years 8 months ago
Abstract—We consider an interference-limited wireless network, where multiple source-destination pairs compete for the same pool of relay nodes. In an attempt to maximize the sum...