Sciweavers

66 search results - page 9 / 14
» Distributed Scheduling in Input Queued Switches
Sort
View
GLOBECOM
2006
IEEE
15 years 3 months ago
A Practical Switch-Memory-Switch Architecture Emulating PIFO OQ
— Emulating Output Queued (OQ) Switch with sustainable implementation cost and low fixed delay is always preferable in designing high performance routers. The SwitchMemory-Switch...
Nan Hua, Yang Xu, Peng Wang, Depeng Jin, Lieguang ...
66
Voted
HOTI
2002
IEEE
15 years 2 months ago
A Four-Terabit Single-Stage Packet Switch with Large Round-Trip Time Support
We present the architecture and practical VLSI implementation of a 4-Tb/s single-stage switch. It is based on a combined input- and crosspoint-queued structure with virtual output...
François Abel, Cyriel Minkenberg, Ronald P....
LCN
2005
IEEE
15 years 3 months ago
Rate-based Flow-control for the CICQ Switch
A combined input and crosspoint queued (CICQ) switch with a flow control latency of round-trip time (RTT) packets requires each crosspoint (CP) buffer to hold the RTT packets in o...
Kenji Yoshigoe
TON
2002
77views more  TON 2002»
14 years 9 months ago
Packet-mode scheduling in input-queued cell-based switches
We consider input-queued switch architectures dealing at their interfaces with variable-size packets, but internally operating on fixed-size cells. Packets are segmented into cells...
Marco Ajmone Marsan, Andrea Bianco, Paolo Giaccone...
INFOCOM
1998
IEEE
15 years 1 months ago
Implementing Distributed Packet Fair Queueing in a Scalable Switch Architecture
To support the Internet's explosive growth and expansion into a true integrated services network, there is a need for cost-effective switching technologies that can simultaneo...
Donpaul C. Stephens, Hui Zhang