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SAC
2006
ACM
16 years 1 months ago
Building the functional performance model of a processor
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
Alexey L. Lastovetsky, Ravi Reddy, Robert Higgins
ASAP
2005
IEEE
112views Hardware» more  ASAP 2005»
16 years 26 days ago
On the Advantages of Serial Architectures for Low-Power Reliable Computations
This paper explores low-power reliable microarchitectures for addition. Power, speed, and reliability (both defect- and fault-tolerance) are important metrics of system design, sp...
Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray R...
CCGRID
2005
IEEE
16 years 26 days ago
A dynamically adaptive hybrid algorithm for scheduling lightpaths in lambda-grids
This paper focuses on the scheduling of multiple-wavelength lightpaths and outlines an algorithm to provide increased simultaneous allocations of lightpaths on the Lambda-Grid. Se...
Neena R. Kaushik, Silvia M. Figueira
DSRT
2005
IEEE
16 years 25 days ago
Exploring the Use of Local Consistency Measures as Thresholds for Dead Reckoning Update Packet Generation
Human-to-human interaction across distributed applications requires that sufficient consistency be maintained among participants in the face of network characteristics such as lat...
David J. Roberts, Damien Marshall, Rob Aspin, S&ea...
HPCA
2005
IEEE
16 years 25 days ago
Exploring the Design Space of Power-Aware Opto-Electronic Networked Systems
As microprocessors become increasingly interconnected, the power consumed by the interconnection network can no longer be ignored. Moreover, with demand for link bandwidth increas...
Xuning Chen, Li-Shiuan Peh, Gu-Yeon Wei, Yue-Kai H...