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» Distributed Synthesis for Alternating-Time Logics
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127
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EDCC
2006
Springer
15 years 4 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...
ERSA
2004
134views Hardware» more  ERSA 2004»
15 years 1 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
103
Voted
CODES
2008
IEEE
15 years 7 months ago
Distributed flit-buffer flow control for networks-on-chip
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
Nicola Concer, Michele Petracca, Luca P. Carloni
82
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NSPW
2004
ACM
15 years 5 months ago
A qualitative framework for Shannon information theories
This paper presents a new paradigm for information theory which is a synthesis of Barwise-Seligman’s qualitative theory and Shannon’s quantitative theory. The new paradigm is ...
Gerard Allwein
92
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IPPS
2009
IEEE
15 years 7 months ago
High-level estimation and trade-off analysis for adaptive real-time systems
We propose a novel design estimation method for adaptive streaming applications to be implemented on a partially reconfigurable FPGA. Based on experimental results we enable accu...
Ingo Sander, Jun Zhu, Axel Jantsch, Andreas Herrho...