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103
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IEEEPACT
2000
IEEE
15 years 4 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
136
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CORR
2010
Springer
14 years 11 months ago
2010
Springer
Deadlock detection scheduling is an important, yet often overlooked problem that can significantly affect the overall performance of deadlock handling. Excessive initiation of dea...
ICS
1998
Tsinghua U.
15 years 3 months ago
1998
Tsinghua U.
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
112
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CORR
2011
Springer
14 years 3 months ago
2011
Springer
Cellular networks are in a major transition from a carefully planned set of large tower-mounted basestations (BSs) to an irregular deployment of heterogeneous infrastructure eleme...
MICRO
2009
IEEE
15 years 6 months ago
2009
IEEE
Efficient memory hierarchy design is critical due to the increasing gap between the speed of the processors and the memory. One of the sources of inefficiency in current caches is...