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» Distributed computation of virtual coordinates
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1999
Tsinghua U.
15 years 7 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
EUROPAR
1998
Springer
15 years 7 months ago
Performance Measurement of Interpreted Programs
Abstract. In an interpreted execution there is an interdependence between the interpreter's execution and the interpreted application's execution; the implementation of t...
Tia Newhall, Barton P. Miller
HPCA
1996
IEEE
15 years 7 months ago
Protected, User-Level DMA for the SHRIMP Network Interface
Traditional DMA requires the operating system to perform many tasks to initiate a transfer, with overhead on the order of hundreds or thousands of CPU instructions. This paper des...
Matthias A. Blumrich, Cezary Dubnicki, Edward W. F...
HPCA
1996
IEEE
15 years 7 months ago
Fault-Tolerance with Multimodule Routers
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
Suresh Chalasani, Rajendra V. Boppana
IPPS
1996
IEEE
15 years 7 months ago
Implementing the Data Diffusion Machine Using Crossbar Routers
The Data Diffusion Machine is a scalable virtual shared memory architecture. A hierarchical network is used to ensure that all data can be located in a time bounded by O(logp), wh...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...