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IEEEPACT
2006
IEEE
15 years 11 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
ICDCSW
2005
IEEE
15 years 11 months ago
On Optimal TTL Sequence-Based Route Discovery in MANETs
In on-demand multi-hop routing protocols for MANETs such as DSR and AODV, a fundamental requirement for peer-to-peer connectivity is to discover routes to a remote node via flood...
Dimitrios Koutsonikolas, Saumitra M. Das, Himabind...
IEEEPACT
2005
IEEE
15 years 11 months ago
Performance Analysis of System Overheads in TCP/IP Workloads
Current high-performance computer systems are unable to saturate the latest available high-bandwidth networks such as 10 Gigabit Ethernet. A key obstacle in achieving 10 gigabits ...
Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Rona...
IEEEPACT
2005
IEEE
15 years 11 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
ECWEB
2004
Springer
225views ECommerce» more  ECWEB 2004»
15 years 11 months ago
Accelerating Database Processing at e-Commerce Sites
Abstract. Most e-commerce Web sites dynamically generate their contents through a three-tier server architecture composed of a Web server, an application server, and a database ser...
Seunglak Choi, Jinwon Lee, Su Myeon Kim, Junehwa S...