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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
15 years 6 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
IPPS
2010
IEEE
15 years 4 months ago
Supporting fault tolerance in a data-intensive computing middleware
Over the last 2-3 years, the importance of data-intensive computing has increasingly been recognized, closely coupled with the emergence and popularity of map-reduce for developin...
Tekin Bicer, Wei Jiang, Gagan Agrawal
IPTPS
2005
Springer
15 years 11 months ago
Dynamic Load Balancing in Distributed Hash Tables
In Peer-to-Peer networks based on consistent hashing and ring topology each server is responsible for an interval chosen (pseudo-)randomly on a circle. The topology of the network...
Marcin Bienkowski, Miroslaw Korzeniowski, Friedhel...
ICA3PP
2010
Springer
15 years 11 months ago
Accelerating Euler Equations Numerical Solver on Graphics Processing Units
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...
Pierre Kestener, Frédéric Chât...
ICS
2011
Tsinghua U.
14 years 9 months ago
Predictive coordination of multiple on-chip resources for chip multiprocessors
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
Jian Chen, Lizy Kurian John