Sciweavers

855 search results - page 126 / 171
» Distributed musical performances: Architecture and stream ma...
Sort
View
IEEEPACT
2005
IEEE
15 years 3 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
CLUSTER
2009
IEEE
15 years 1 months ago
Using a cluster as a memory resource: A fast and large virtual memory on MPI
—The 64-bit OS provides ample memory address space that is beneficial for applications using a large amount of data. This paper proposes using a cluster as a memory resource for...
Hiroko Midorikawa, Kazuhiro Saito, Mitsuhisa Sato,...
DSN
2009
IEEE
15 years 1 months ago
Processor reliability enhancement through compiler-directed register file peak temperature reduction
Each semiconductor technology generation brings us closer to the imminent processor architecture heat wall, with all its associated adverse effects on system performance and reliab...
Chengmo Yang, Alex Orailoglu
CN
2002
98views more  CN 2002»
14 years 9 months ago
New models and algorithms for programmable networks
In todays IP networks most of the network control and management tasks are performed at the end points. As a result, many important network functions cannot be optimized due to la...
Danny Raz, Yuval Shavitt
HPDC
2010
IEEE
14 years 10 months ago
A GPU accelerated storage system
Massively multicore processors, like, for example, Graphics Processing Units (GPUs), provide, at a comparable price, a one order of magnitude higher peak performance than traditio...
Abdullah Gharaibeh, Samer Al-Kiswany, Sathish Gopa...