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ISCAS
2007
IEEE
132views Hardware» more  ISCAS 2007»
15 years 10 months ago
On-Line Histogram Equalization for Flash ADC
— We present theory, design and measurement results for an on-line histogram equalization algorithm implemented on a 750MS/s 6b flash analog to digital converter in standard 0.3...
Yanyi Liu Wong, Marc H. Cohen, Pamela Abshire
SAMOS
2007
Springer
15 years 10 months ago
An Interrupt Controller for FPGA-based Multiprocessors
— Interrupt-based programming is widely used for interfacing a processor with peripherals and allowing software threads to interact. Many hardware/software architectures have bee...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
142
Voted
ICPP
2006
IEEE
15 years 10 months ago
A Parallel, Out-of-Core Algorithm for RNA Secondary Structure Prediction
RNA pseudoknot prediction is an algorithm for RNA sequence search and alignment. An important building block towards pseudoknot prediction is RNA secondary structure prediction. T...
Wenduo Zhou, David K. Lowenthal
ASPLOS
2006
ACM
15 years 10 months ago
SecCMP: a secure chip-multiprocessor architecture
Security has been considered as an important issue in processor design. Most of the existing mechanisms address security and integrity issues caused by untrusted main memory in si...
Li Yang, Lu Peng
159
Voted
PADS
2006
ACM
15 years 10 months ago
Aurora: An Approach to High Throughput Parallel Simulation
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
Alfred Park, Richard M. Fujimoto