139 search results - page 14 / 28 » Distributed sleep transistor network for power reduction |
NOCS
2007
IEEE
15 years 3 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
ISPD
2005
ACM
15 years 3 months ago
2005
ACM
With increase of clock frequency, on-chip wire inductance starts to play an important role in power/ground distribution analysis, although it has not been considered so far. We pe...
MONET
2008
14 years 9 months ago
2008
This paper investigates a distributed and adaptive approach to manage spectrum usage in dynamic spectrum access networks. While previous works focus on centralized provisioning, w...
73
Voted
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
63
Voted
ISCAS
2007
IEEE
15 years 3 months ago
2007
IEEE
— Design and analysis guidelines for resonant interconnect networks are presented in this paper. The methodology focuses on developing an accurate analytic distributed model of t...