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» Distributed sleep transistor network for power reduction
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HPCA
2003
IEEE
15 years 10 months ago
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
Li Shang, Li-Shiuan Peh, Niraj K. Jha
MSWIM
2006
ACM
15 years 3 months ago
The power of choice in random walks: an empirical study
In recent years different authors have proposed the used of random-walk-based algorithms for varying tasks in the networking community. These proposals include searching, routing...
Chen Avin, Bhaskar Krishnamachari
CODES
2010
IEEE
14 years 7 months ago
A greedy buffer allocation algorithm for power-aware communication in body sensor networks
Monitoring human movements using wireless sensory devices promises to revolutionize the delivery of healthcare services. In spite of their potentials for many application domains,...
Hassan Ghasemzadeh, Roozbeh Jafari
ICDCS
2010
IEEE
15 years 1 months ago
Extracting More Capacity from Multi-channel Multi-radio Wireless Networks by Exploiting Power
—Transmission power plays a crucial role in the design and performance of wireless networks. The issue is therefore complex since an increase in transmission power implies that a...
Devu Manikantan Shila, Yu Cheng, Tricha Anjali, Pe...
DSN
2009
IEEE
15 years 1 months ago
Processor reliability enhancement through compiler-directed register file peak temperature reduction
Each semiconductor technology generation brings us closer to the imminent processor architecture heat wall, with all its associated adverse effects on system performance and reliab...
Chengmo Yang, Alex Orailoglu