7379 search results - page 1074 / 1476 » Distributed vector architectures |
133
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HPCA
2007
IEEE
16 years 5 months ago
2007
IEEE
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
155
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HPCA
2007
IEEE
16 years 5 months ago
2007
IEEE
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
134
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HPCA
2006
IEEE
16 years 5 months ago
2006
IEEE
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
148
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HPCA
2004
IEEE
16 years 5 months ago
2004
IEEE
Using alternative cache indexing/hashing functions is a popular technique to reduce conflict misses by achieving a more uniform cache access distribution across the sets in the ca...
249
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POPL
2001
ACM
16 years 5 months ago
2001
ACM
Secure Safe Ambients (SSA) are a typed variant of Safe Ambients [9], whose type system allows behavioral invariants of ambients to be expressed and verified. The most significant a...