Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
— In this paper, we propose a game theoretical approach to tackle the problem of the distributed formation of the uplink tree structure among the relay stations (RSs) and their s...
— There are many grid-based applications where a timely response to an important event is needed. Often such response can require a significant computation and possibly communic...
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...