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ISPASS
2010
IEEE
15 years 8 months ago
Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
Karthik Ganesan, Jungho Jo, Lizy K. John
ICC
2009
IEEE
197views Communications» more  ICC 2009»
15 years 8 months ago
A Game-Based Self-Organizing Uplink Tree for VoIP Services in IEEE 802.16j Networks
— In this paper, we propose a game theoretical approach to tackle the problem of the distributed formation of the uplink tree structure among the relay stations (RSs) and their s...
Walid Saad, Zhu Han, Mérouane Debbah, Are H...
IPPS
2009
IEEE
15 years 8 months ago
A resource allocation approach for supporting time-critical applications in grid environments
— There are many grid-based applications where a timely response to an important event is needed. Often such response can require a significant computation and possibly communic...
Qian Zhu, Gagan Agrawal
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 8 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
CF
2009
ACM
15 years 8 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig