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133
Voted
ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
15 years 7 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane
98
Voted
ENC
2005
IEEE
15 years 7 months ago
Hard Problem Generation for MKP
We developed generators that produce challenging MKP instances. Our approaches uses independently exponential distributions over a wide range to generate the constraint coefficien...
Maria A. Osorio, Germn Cuaya
IPPS
2005
IEEE
15 years 7 months ago
Runtime Empirical Selection of Loop Schedulers on Hyperthreaded SMPs
Hyperthreaded (HT) and simultaneous multithreaded (SMT) processors are now available in commodity workstations and servers. This technology is designed to increase throughput by e...
Yun Zhang, Michael Voss
MICRO
2005
IEEE
163views Hardware» more  MICRO 2005»
15 years 7 months ago
ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...
Smruti R. Sarangi, Wei Liu, Yuanyuan Zhou
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
15 years 7 months ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...