1912 search results - page 256 / 383 » Don't Compare Averages |
136
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GLVLSI
2010
IEEE
15 years 3 months ago
2010
IEEE
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
ASPDAC
2008
ACM
15 years 3 months ago
2008
ACM
- In multi-layered power/ground (P/G) networks, to connect the whole network together, vertical vias are usually placed at intersections between metal wires of adjoining layers. In...
ASPDAC
2008
ACM
15 years 3 months ago
2008
ACM
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
113
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CCGRID
2008
IEEE
15 years 3 months ago
2008
IEEE
Prefetching is an effective technique for improving file access performance, which can reduce access latency for I/O systems. In distributed storage system, prefetching for metadat...
126
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ASPDAC
2005
ACM
15 years 3 months ago
2005
ACM
Ever scaling process technology makes embedded systems more vulnerable to soft errors than in the past. One of the generic methods used to fight soft errors is based on duplicati...