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ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
15 years 6 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
MICRO
2008
IEEE
131views Hardware» more  MICRO 2008»
15 years 6 months ago
Token flow control
As companies move towards many-core chips, an efficient onchip communication fabric to connect these cores assumes critical importance. To address limitations to wire delay scala...
Amit Kumar 0002, Li-Shiuan Peh, Niraj K. Jha
NDSS
2008
IEEE
15 years 6 months ago
Automatic Protocol Format Reverse Engineering through Context-Aware Monitored Execution
Protocol reverse engineering has often been a manual process that is considered time-consuming, tedious and error-prone. To address this limitation, a number of solutions have rec...
Zhiqiang Lin, Xuxian Jiang, Dongyan Xu, Xiangyu Zh...
VTC
2008
IEEE
160views Communications» more  VTC 2008»
15 years 6 months ago
Reducing Feedback Requirements of the Multiple Weight Opportunistic Beamforming Scheme via Selective Multiuser Diversity
—Opportunistic beamforming (OB) relies on the transmission of Channel State Information (CSI) in the form of instantaneous Signal to Noise Ratio (SNR) from Mobile Stations (MSs) ...
Marios Nicolaou, Angela Doufexi, Simon Armour
DATE
2007
IEEE
104views Hardware» more  DATE 2007»
15 years 6 months ago
Dynamic reconfiguration in sensor networks with regenerative energy sources
In highly power constrained sensor networks, harvesting energy from the environment makes prolonged or even perpetual execution feasible. In such energy harvesting systems, energy...
Ani Nahapetian, Paolo Lombardo, Andrea Acquaviva, ...