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IWMM
2007
Springer
146views Hardware» more  IWMM 2007»
15 years 6 months ago
Allocation-phase aware thread scheduling policies to improve garbage collection performance
Past studies have shown that objects are created and then die in phases. Thus, one way to sustain good garbage collection efficiency is to have a large enough heap to allow many ...
Feng Xian, Witawas Srisa-an, Hong Jiang
LCTRTS
2007
Springer
15 years 6 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
PATMOS
2007
Springer
15 years 6 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
CGO
2006
IEEE
15 years 6 months ago
Selecting Software Phase Markers with Code Structure Analysis
Most programs are repetitive, where similar behavior can be seen at different execution times. Algorithms have been proposed that automatically group similar portions of a program...
Jeremy Lau, Erez Perelman, Brad Calder
CODES
2006
IEEE
15 years 6 months ago
A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
Wei Qin, Joseph D'Errico, Xinping Zhu