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MICRO
2007
IEEE
103views Hardware» more  MICRO 2007»
15 years 6 months ago
Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing
Parameter variation is detrimental to a processor’s frequency and leakage power. One proposed technique to mitigate it is Fine-Grain Body Biasing (FGBB), where different parts o...
Radu Teodorescu, Jun Nakano, Abhishek Tiwari, Jose...
TWC
2008
117views more  TWC 2008»
14 years 11 months ago
Achievable Rates and Fairness in Rateless Coded Relaying Schemes
Abstract--The average throughput of three decode-andforward (DF) half-duplex (DFHD) and two DF full-duplex (DFFD) rateless coded relaying schemes are studied under a peak power con...
Reza Nikjah, Norman C. Beaulieu
ICDE
2002
IEEE
209views Database» more  ICDE 2002»
16 years 1 months ago
Geometric-Similarity Retrieval in Large Image Bases
We propose a novel approach to shape-based image retrieval that builds upon a similarity criterion which is based on the average point set distance. Compared to traditional techni...
Ioannis Fudos, Leonidas Palios, Evaggelia Pitoura
DAC
2008
ACM
16 years 26 days ago
An integrated nonlinear placement framework with congestion and porosity aware buffer planning
Due to skewed scaling of interconnect delay and cell delay with technology scaling, modern VLSI timing closure requires use of extensive buffer insertion. Inserting a large number...
Tung-Chieh Chen, Ashutosh Chakraborty, David Z. Pa...
DAC
2000
ACM
16 years 25 days ago
An architecture-driven metric for simultaneous placement and global routing for FPGAs
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, con...
Yao-Wen Chang, Yu-Tsang Chang