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ASPDAC
2010
ACM
163views Hardware» more  ASPDAC 2010»
14 years 11 months ago
A3MAP: architecture-aware analytic mapping for networks-on-chip
- In this paper, we propose a novel and global A3MAP (Architecture-Aware Analytic Mapping) algorithm applied to NoC (Networks-on-Chip) based MPSoC (Multi-Processor System-on-Chip) ...
Wooyoung Jang, David Z. Pan
TCOM
2010
77views more  TCOM 2010»
14 years 8 months ago
Semi-Analytical Performance Prediction Methods for Iterative MMSE-IC Multiuser MIMO Joint Decoding
In this paper, two semi-analytical performance prediction methods are proposed and compared for multiuser MIMO transmission over block-fading multipath channels and iterative MMSE...
Raphaël Visoz, Antoine O. Berthet, Massinissa...
HPCA
2012
IEEE
13 years 9 months ago
BulkSMT: Designing SMT processors for atomic-block execution
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...
Xuehai Qian, Benjamin Sahelices, Josep Torrellas
ICCD
2006
IEEE
189views Hardware» more  ICCD 2006»
15 years 10 months ago
A Capacity Co-allocation Configurable Cache for Low Power Embedded Systems
— Traditional level-one instruction caches and data caches for embedded systems typically have the same capacities. Configurable caches either shut down a part of the cache to su...
Chuanjun Zhang
DATE
2008
IEEE
134views Hardware» more  DATE 2008»
15 years 8 months ago
Adaptive Filesystem Compression for Embedded Systems
Abstract—Embedded system secondary storage size is often constrained, yet storage demands are growing as a result of increasing application complexity and storage of personal dat...
Lan S. Bai, Haris Lekatsas, Robert P. Dick