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ICCD
2004
IEEE
154views Hardware» more  ICCD 2004»
15 years 8 months ago
A High-Frequency Decimal Multiplier
Decimal arithmetic is regaining popularity in the computing community due to the growing importance of commercial, financial, and Internet-based applications, which process decima...
Robert D. Kenney, Michael J. Schulte, Mark A. Erle
DAC
2004
ACM
16 years 21 days ago
Multiple constant multiplication by time-multiplexed mapping of addition chains
An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We prop...
James C. Hoe, Markus Püschel, Peter Tummeltsh...
ITC
2003
IEEE
123views Hardware» more  ITC 2003»
15 years 5 months ago
A Comprehensive Approach to Assessing and Analyzing 1149.1 Test Logic
In this paper we introduce a tool which is capable of verifying an 1149.1 test logic implementation and its compliance to the IEEE 1149.1 Standard [1][2] while providing a precise...
Kevin Melocco, Hina Arora, Paul Setlak, Gary Kunse...
DATE
2008
IEEE
78views Hardware» more  DATE 2008»
15 years 6 months ago
Transistor-Specific Delay Modeling for SSTA
SSTA has received a considerable amount of attention in recent years. However, it is a general rule that any approach can only be as accurate as the underlying models. Thus, varia...
Brian Cline, Kaviraj Chopra, David Blaauw, Andres ...
VLSI
2007
Springer
15 years 5 months ago
A low-power deblocking filter architecture for H.264 advanced video coding
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
Jaemoon Kim, Sangkwon Na, Chong-Min Kyung