During the last years, several logic styles that counteract side-channel attacks have been proposed. They all have in common that their level of resistance heavily depends on imple...
This work proposes a compact implementation of the AES S-box using composite field arithmetic in GF(((22 ) 2 ) 2 ). It describes a systematic exploration of different choices for...
Nele Mentens, Lejla Batina, Bart Preneel, Ingrid V...
With continued reductions in feature size, additional functionality may be added to future microprocessors to boost the performance of important application domains. Due to growth...
Decreasing feature sizes allow additional functionality to be added to future microprocessors to improve the performance of important application domains. As a result of rapid gro...
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...