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DATE
2000
IEEE
83views Hardware» more  DATE 2000»
15 years 6 months ago
Predicting Coupled Noise in RC Circuits
A novel method which can be regarded as the noisecounterpart of the celebrated Elmore’s delay formula— both being based on the first two moments of the network’s transfer fu...
Bernard N. Sheehan
GLVLSI
2000
IEEE
110views VLSI» more  GLVLSI 2000»
15 years 6 months ago
A sensitivity based placer for standard cells
We present a new timing driven method for global placement. Our method is based on the observation that similar net length reductions in the different nets that make up a path may...
Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
CSE
2009
IEEE
15 years 5 months ago
Optimization of Component Connections for an Embedded Component System
Software component techniques are widely used to enhance productivity and reduce the cost of software systems development. This paper proposes optimization of component connections...
Takuya Azumi, Hiroaki Takada, Hiroshi Oyama
DAC
1995
ACM
15 years 5 months ago
Simultaneous Gate and Interconnect Sizing for Circuit-Level Delay Optimization
Abstract—With delays due to the physical interconnect dominating the overall logic path delays, circuit-level delay optimization must take interconnect effects into account. Inst...
Noel Menezes, Satyamurthy Pullela, Lawrence T. Pil...
FPGA
1995
ACM
120views FPGA» more  FPGA 1995»
15 years 5 months ago
Synthesis of Signal Processing Structured Datapaths for FPGAs Supporting RAMs and Busses
A novel approach is presented for transforming a given scheduled and bound signal processing algorithm for a multiplexer based datapath to a BUS/RAM based FPGA datapath. A datapat...
Baher Haroun, Behzad Sajjadi