347 search results - page 62 / 70 » Dynamic Analysis Techniques for the Reconstruction of Archit... |
124
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CODES
2009
IEEE
15 years 4 months ago
2009
IEEE
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
DAGM
2003
Springer
15 years 4 months ago
2003
Springer
Compared to their ancestors in the early 1970s, present day computer games are of incredible complexity and show magnificent graphical performance. However, in programming intelli...
105
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CODES
2005
IEEE
15 years 5 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
102
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PPOPP
2010
ACM
15 years 6 months ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
113
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MM
2010
ACM
14 years 12 months ago
2010
ACM
Reliable delivery of 3D video contents to a wide set of users is expected to be the next big revolution in multimedia applications provided that it is possible to grant a certain ...