4725 search results - page 237 / 945 » Dynamic Architecture Extraction |
153
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SC
1995
ACM
15 years 8 months ago
1995
ACM
The goal of this work is to explore architectural mechanisms for supporting explicit communication in cachecoherent shared memory multiprocessors. The motivation stems from the ob...
180
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CG
2008
Springer
15 years 4 months ago
2008
Springer
As multi-core processor systems become more and more widespread, the demand for efficient parallel algorithms also propagates into the field of computer graphics. This is especial...
134
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UAIS
2008
15 years 4 months ago
2008
This paper presents the modules that comprise a knowledge-based sign synthesis architecture for Greek sign language (GSL). Such systems combine natural language (NL) knowledge, mac...
177
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IPPS
2010
IEEE
15 years 2 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
145
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TCAD
2010
14 years 11 months ago
2010
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...