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129
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NGC
2000
Springer
124views Communications» more  NGC 2000»
15 years 3 months ago
Temporal Disjunctive Logic Programming
In this paper we introduce the logic programminglanguage Disjunctive Chronolog which combines the programming paradigms of temporal and disjunctive logic programming. Disjunctive C...
Manolis Gergatsoulis, Panos Rondogiannis, Themis P...
MICRO
2005
IEEE
108views Hardware» more  MICRO 2005»
15 years 9 months ago
How to Fake 1000 Registers
Large numbers of logical registers can improve performance by allowing fast access to multiple subroutine contexts (register windows) and multiple thread contexts (multithreading)...
David W. Oehmke, Nathan L. Binkert, Trevor N. Mudg...
ENTCS
2008
68views more  ENTCS 2008»
15 years 3 months ago
The Reach-and-Evolve Algorithm for Reachability Analysis of Nonlinear Dynamical Systems
This paper introduces a new algorithm dedicated to the rigorous reachability analysis of nonlinear dynamical systems. The algorithm is initially presented in the context of discre...
Pieter Collins, Alexandre Goldsztejn
131
Voted
ECAI
2004
Springer
15 years 9 months ago
Analysis of Design Process Dynamics
To enable the development of automated support for the dynamics of design processes, a challenge is to model and analyse such dynamics in a formal manner. This paper contributes a ...
Tibor Bosse, Catholijn M. Jonker, Jan Treur
ISCAS
2006
IEEE
103views Hardware» more  ISCAS 2006»
15 years 9 months ago
A high-speed low-energy dynamic PLA using an input-isolation scheme
— Recently, there has been renewed interest in structured logic arrays due to a number of inherent advantages. However, before they will be more widely adopted, structured logic ...
Reza Molavi, Shahriar Mirabbasi, Resve A. Saleh