3831 search results - page 158 / 767 » Dynamic Context Logic |
125
Voted
PATMOS
2005
Springer
15 years 9 months ago
2005
Springer
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
149
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TVLSI
2008
15 years 4 months ago
2008
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
119
Voted
VAMOS
2008
Springer
15 years 5 months ago
2008
Springer
In this paper we propose an approach to support dynamic or runtime variability in systems that must adapt dynamically to changing runtime context. The approach is founded on refle...
125
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SPLC
2008
15 years 5 months ago
2008
Scalability is recognized as a key challenge in the automated analysis of Feature Models (FMs). Current solutions in this context mainly propose using different logic paradigms as...
103
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ACL
1992
15 years 5 months ago
1992
We present a new compositional tense-aspect deindexing mechanism that makes use of tense trees as components of discourse contexts. The mechanism allows reference episodes to be c...