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107
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FPGA
2001
ACM
162views FPGA» more  FPGA 2001»
15 years 5 months ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,...
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
15 years 5 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
15 years 5 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
ICCAD
1994
IEEE
117views Hardware» more  ICCAD 1994»
15 years 5 months ago
Optimal latch mapping and retiming within a tree
We propose a technology mapping algorithm that takes existing structural technology-mapping algorithms based on dynamic programming [1,3,4] and extends them to retime pipelined cir...
Joel Grodstein, Eric Lehman, Heather Harkness, Her...
112
Voted
USENIX
2008
15 years 3 months ago
FlexVol: Flexible, Efficient File Volume Virtualization in WAFL
zation is a well-known method of abstracting physical resources and of separating the manipulation and use of logical resources from their underlying implementation. We have used ...
John K. Edwards, Daniel Ellard, Craig Everhart, Ro...