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89
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ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
15 years 7 days ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
95
Voted
CF
2005
ACM
15 years 6 days ago
Evaluation of extended dictionary-based static code compression schemes
This paper evaluates how much extended dictionary-based code compression techniques can reduce the static code size. In their simplest form, such methods statically identify ident...
Martin Thuresson, Per Stenström
AAAI
2006
14 years 11 months ago
The Robot Intelligence Kernel
The Robot Intelligence Kernel (RIK) is a portable, reconfigurable suite of perceptual, behavioral, and cognitive capabilities that can be used across many different platforms, env...
David J. Bruemmer, Douglas A. Few, Miles C. Walton...
MM
2010
ACM
210views Multimedia» more  MM 2010»
14 years 10 months ago
Increasing interactivity in street view web navigation systems
This paper presents some interactive features we have added on our street-view web navigation application. Our system allows to navigate through a huge amount of data (panoramas a...
Alexandre Devaux, Nicolas Paparoditis
DSD
2010
IEEE
144views Hardware» more  DSD 2010»
14 years 10 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen